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HPE Unveils Demonstration Chip Designed to Bolster Optical Computation Process Speeds

HPE Unveils Demonstration Chip Designed to Bolster Optical Computation Process Speeds - top government contractors - best government contracting event
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HPE Unveils Demonstration Chip Designed to Bolster Optical Computation Process Speeds - top government contractors - best government contracting eventHewlett Packard Enterprise has developed a demonstration chip designed to speed up optical computation processes as part of a Defense Advanced Research Projects Agency program that aims to develop communication, sensing, and computation technologies using mesoscale characteristics, IEEE reported Monday.

Rachel Courtland writes the company’s Hewlett Packard Labs business developed the chip, which was created via the Mesodynamic Architecture program, as an implementation of the Ising machine computation approach.

Ising machines are designed to find the best solution to problems that involve large numbers of competing alternatives.

Dave Kielpinski, senior research scientist at Hewlett Packard Labs, said the chip project aims to address the limits of photonic chip design and the HPE team will investigate designs that could help further develop such demonstration chips.

The report noted that the future Ising chips may help accelerate machines in a similar manner as graphics processing units.

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Written by Scott Nicholas

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